Capitalise on Averna’s leading expertise for DOCSIS and EuroDOCSIS devices. Our full suite of test and measurement solutions covers every aspect of design verification, performance and troubleshooting. These ready-to-ship platforms ensure faster industry certifications, higher product quality and a future-proofed investment.
1. The Industry’s Best DOCSIS 3.1 Protocol Analyzer
Averna’s DOCSIS Protocol Analyzers are the industry standard for functional DOCSIS and EuroDOCSIS network analysis, providing exceptional visibility into the MAC layer. Multiple system operators (MSOs), chipset manufacturers, product developers and certification bodies use them to quickly find and correct trouble spots.
Award-Winning Features for the Next Generation of DOCSIS
Optimised with FPGA technology for real-time signal processing, the DP-1000 analyzes up to 32×8 single or bonded US/DS channels (DOCSIS 3.0) and 2×1 OFDM US/DS channels (DOCSIS 3.1). It has numerous channel-filtering, demodulation, triggering, display and upgrade features – which led to awards from BTR and Frost & Sullivan.
As a passive sniffer between CMTS and CPE devices, the DP-1000 silently captures and filters DOCSIS MAC-layer data in real-time to verify RF parameters, validate MAC-level communication, troubleshoot interoperability issues and improve network performance.
DP-1000 Highlights
- Supports both DOCSIS 3.1 and 3.0 protocols through FPGA-based signal processing
- Input DS frequency range of 5 MHz–1.8 GHz (5–200 MHz US), and resolution of 1 MHz
- Up to 7 acquisition cards of 200-MHz bandwidth each (5 DS, 1 US and 1 additional US or DS)
- Contained in a single, 19-inch (48 cm), 4U rack for minimal footprint (60 lbs/27 kg)
- FPGA-based architecture is highly flexible, configurable, upgradable and extendable
- Many channel-filtering and display features like placement, burst, constellation, and spectrum
- Optional DOCSIS vector signal analyzer (VSA) for RF measurements like SNR, MER, and EVM
Handles Multiple DOCSIS 3.1 Challenges
- Network bandwidth and channel expansion
- Orthogonal Frequency Division Multiplexing (OFDM)
- New modulation schemes of up to 4096 QAM
- Mixed-mode operation to support DOCSIS 3.0 and 3.1 devices
2. Speed up Product Development with the Jupiter 310
The Jupiter 310 Design Verification System is the industry standard for automated DOCSIS physical (PHY) layer testing, providing the most comprehensive coverage and accurate results on the market for DOCSIS 3.1 devices. It enables cable product developers, MSOs and certification labs to perform automated verification of their equipment for certification purposes.
DOCSIS 3.1 Products Certified Faster Than Ever
Developers and testers of cable modems, set-top boxes, residential gateways and other customer-premises equipment (CPE) depend on Jupiter’s built-in DOCSIS 3.1 acceptance test plan (ATP) to apply all the necessary PHY tests, letting them know exactly when their products are ready for certification.
A Wide Range of Test & Productivity Tools
- Integrated CableLabs© PHY layer acceptance test plan (ATP)
- Averna Test Executive for automated testing and results
- Test Plan Editor to modify PHY procedure test cases
- Toolkit for updating test sequences and syncing the ATP
- Dashboard for instrument/modem monitoring and control
- Admin tools for measurement and trace queries/reports
- Diagnostic tools for quick troubleshooting and support
Learn more about Jupiter’s leading DOCSIS 3.1 test coverage.
Averna
+44 1793 608805